Semiconductor Electronics — JEE Main Questions

40 JEE Main practice questions on Semiconductor Electronics, part of Physics. Below are 12 of them in full, each with the answer and a written explanation.

Questions & explanations

1. Two input waveforms A and B are applied to a NAND gate. A is high from 0-2 s and 4-6 s, low from 2-4 s. B is low from 0-1 s, high from 1-3 s, low from 3-5 s, high from 5-6 s. The output is high for how many seconds?

  1. 2 s
  2. 3 s
  3. 5 s
  4. 4 s

Answer: 4 s

NAND gate output is high when at least one input is low. From 0-1 s: A high, B low → output high. 1-2 s: both high → output low. 2-3 s: A low, B high → output high. 3-4 s: both low → output high. 4-5 s: A high, B low → output high. 5-6 s: both high → output low. High intervals: 0-1, 2-3, 3-4, 4-5 → total 4 s.

2. Two input waveforms A and B and output Y are given. A: high 0-2 s, low 2-4 s, high 4-6 s. B: low 0-1 s, high 1-3 s, low 3-5 s, high 5-6 s. Y: high 0-1 s, low 1-2 s, high 2-3 s, high 3-4 s, high 4-5 s, low 5-6 s. Which gate produces Y?

  1. AND
  2. NAND
  3. OR
  4. NOR

Answer: NAND

Check each interval: 0-1 s: A=1,B=0 → NAND=1, matches Y=1. 1-2 s: A=1,B=1 → NAND=0, matches Y=0. 2-3 s: A=0,B=1 → NAND=1, matches Y=1. 3-4 s: A=0,B=0 → NAND=1, matches Y=1. 4-5 s: A=1,B=0 → NAND=1, matches Y=1. 5-6 s: A=1,B=1 → NAND=0, matches Y=0. All intervals match, so the gate is NAND.

3. Which single gate is equivalent to the circuit made using only NAND gates that implements the XNOR function?

  1. XNOR gate
  2. OR gate
  3. AND gate
  4. XOR gate

Answer: XNOR gate

XNOR gives output 1 when both inputs are equal. Using only NAND gates, we can construct XNOR by first obtaining NOT of each input using NAND as inverter, then combining them with additional NAND gates to realize the expression AB + A̅B̅. The final circuit is equivalent to an XNOR gate.

4. A 3-NAND circuit has inputs A and B. The output Y is found to be equivalent to which single gate?

  1. OR
  2. AND
  3. NAND
  4. NOT

Answer: NAND

Using De Morgan's law, the output of three NAND gates in series simplifies to a single NAND gate. The first NAND gives (A·B)̅, the second NAND with A gives (A·(A·B)̅)̅ = A̅+B, and the third NAND with B gives (B·(A̅+B))̅ = (A·B)̅, which is a NAND gate.

5. How many NAND gates are needed to build an XOR gate using only NAND gates?

  1. 3
  2. 4
  3. 5
  4. 6

Answer: 4

XOR gate can be built using 4 NAND gates. The expression is (A NAND (A NAND B)) NAND (B NAND (A NAND B)). This uses one NAND for (A NAND B), two more for the left and right branches, and one final NAND to combine them, totaling 4.

6. How many NAND gates are needed to build an AND gate?

  1. 1
  2. 4
  3. 3
  4. 2

Answer: 2

An AND gate can be realized using two NAND gates. The first NAND gate gives (A·B)̅. The second NAND gate with both inputs tied together acts as a NOT gate, giving ((A·B)̅)̅ = A·B. Thus, two NAND gates are sufficient.

7. How many NOR gates are needed to build an XNOR gate using only NOR gates?

  1. 3
  2. 5
  3. 4
  4. 6

Answer: 4

XNOR gate can be built using 4 NOR gates. First, two NOR gates act as inverters to get A̅ and B̅. Then, two NOR gates compute (A+B̅)̅ and (B+A̅)̅. Finally, a NOR gate combines these to get XNOR. Total 4 NOR gates.

8. How many NOR gates are needed to build an OR gate?

  1. 1
  2. 2
  3. 3
  4. 4

Answer: 2

An OR gate can be built using two NOR gates. The first NOR gate gives (A+B)̅. The second NOR gate with both inputs tied together acts as a NOT gate, giving ((A+B)̅)̅ = A+B. Thus, two NOR gates are sufficient.

9. How many NAND gates are required to realize an OR gate?

  1. 3
  2. 2
  3. 4
  4. 5

Answer: 3

An OR gate is realized using three NAND gates. Two NAND gates with tied inputs act as inverters to produce A̅ and B̅. These are fed to a third NAND gate, whose output is (A̅·B̅)̅ = A + B by De Morgan's law.

10. A circuit uses two NAND gates: first NAND with inputs A and B, second NAND with both inputs tied to output of first. Which single gate does this circuit equal?

  1. NAND
  2. OR
  3. AND
  4. NOT

Answer: AND

First NAND outputs (A·B)'. Second NAND with tied inputs acts as inverter, so output = ((A·B)')' = A·B, which is AND gate. This uses De Morgan's theorem and the inverter property of NAND with shorted inputs.

11. A NAND-based circuit and a NOR-based circuit are claimed to both implement the OR gate. Which method proves equivalence?

  1. Compare propagation delay
  2. Compare number of gates
  3. Compare power consumption
  4. Compare truth tables

Answer: Compare truth tables

Two circuits are functionally equivalent if they produce the same output for all input combinations. The truth table lists outputs for every input, so comparing truth tables definitively proves equivalence.

12. Which of the following gates are called universal gates?

  1. NAND and NOR
  2. AND and OR
  3. NOT and XOR
  4. NAND and OR

Answer: NAND and NOR

A universal gate can realize any Boolean function. According to NCERT, NAND and NOR gates are universal because using only NAND gates (or only NOR gates) we can construct NOT, AND, OR, and any other gate.

More Physics topics

This page shows 12 of 40 questions on this topic. The full set, with progress tracking and five agent perspectives per question, is in the JupiteX app — browse the exam catalogue or browse the Learn library.