We want to be god of small things: IIT team aims to fab India's first 65nm GPU

What is a GPU, and why does the IIT Delhi team call its design a “micro-GPU” rather than a full GPU?

A GPU, or graphics processing unit, performs the calculations needed to create images and graphics on a screen. More powerful GPUs can handle more calculations at once, but they usually consume more power. That trade-off matters for small devices.

IIT Delhi’s design is called a micro-GPU because it is not a full, high-performance GPU. The team is not trying to compete with Nvidia or AMD. Instead, it is building a smaller graphics processor for handhelds and other devices where extreme graphics performance is unnecessary.

Possible uses include electric-vehicle displays, medical diagnostic displays, and e-rickshaw meters. These screens do not need to operate at very high speeds. The design has been demonstrated on a Spartan-7 FPGA, but it must still be fabricated and validated before becoming a finished chip.

What has the team actually built so far, and what still needs to happen before the design becomes a working chip?

IIT Delhi has developed and demonstrated a programmable graphics processor, but the work is still a prototype. The team mapped the design onto a Spartan-7 FPGA, which is programmable hardware used to test digital circuit designs. This proves the design can operate in hardware, but it is not yet a finished semiconductor product.

The next step is to turn the design into a VLSI ASIC, or application-specific integrated circuit. The team wants to realise the current design on silicon using a 65-nanometer manufacturing process. A physical chip could then be tested under real operating conditions.

Fabrication is not the only remaining task. The manufactured chip must also be validated, and its performance can be optimised beyond the FPGA version. India currently lacks a 65-nanometer ASIC fabrication facility, so the first chip may need to be made abroad.

How small is 65-nanometer technology, and what does that measurement describe in a semiconductor manufacturing process?

A nanometer is one billionth of a metre, so 65 nanometers equals 65 billionths of a metre. That is vastly smaller than the width of a human hair. The number refers to the manufacturing scale used to create structures in a semiconductor, not to the complete chip’s dimensions.

The article does not explain the measurement itself. In semiconductor terms, a 65-nanometer process generally describes the approximate scale of important features in the circuit, such as transistor structures and wiring. The process determines how densely the design can be built on silicon.

For IIT Delhi, 65 nanometers is the planned technology for turning the FPGA-tested design into an ASIC. It is an established process rather than a claim that the whole graphics chip will be 65 nanometers wide. The team may need an overseas fab because India currently lacks this capability.

Why is the micro-GPU being designed for low-power edge devices such as electric-vehicle displays, medical equipment, and e-rickshaw meters?

High-performance graphics processors can perform many calculations at once, but they can also consume substantial power. IIT Delhi is choosing a different goal. Its micro-GPU is meant for small, low-cost devices that need useful graphics without demanding extreme performance or energy.

For example, an electric-vehicle display can show information without rendering complex, fast-moving graphics. Medical diagnostic displays and e-rickshaw meters likewise need readable screen output, but not necessarily very high operating speeds. A smaller graphics processor could handle these tasks while fitting devices with limited power budgets.

The team says it is targeting edge applications and handhelds that consume very little power. This focus could help such devices spread more widely in India. The micro-GPU is still a prototype, however, so its practical performance and power use must be tested after fabrication.

What is the difference between testing a chip design on an FPGA and manufacturing it as an ASIC on silicon?

An FPGA is programmable hardware. Researchers can map a digital circuit design onto it, change the design, and test how it behaves. This makes an FPGA useful for proving that a proposed processor works before committing to a manufacturing process.

An ASIC is different because it is built for a specific function during semiconductor fabrication. IIT Delhi wants to realise its current micro-GPU design as a VLSI ASIC on a silicon wafer. Unlike the FPGA mapping, this would create an actual manufactured chip whose physical implementation can be measured and improved.

The FPGA version is therefore an important working prototype, but it is not the final product. The team still needs to tape out the design, manufacture it using 65-nanometer technology, and validate it. The article says ASIC fabrication could optimise performance beyond the current FPGA realisation.

Why might the IIT team need to manufacture the chip abroad, and what domestic alternatives could become available as India builds new fabs?

The design is homegrown, but manufacturing it requires a suitable semiconductor fabrication facility. IIT Delhi is targeting a 65-nanometer ASIC process, and the article states that India currently does not have a fab capable of making such chips. The team may therefore need to send the design to a facility abroad.

This does not mean the research is moving overseas. The chip’s architecture and prototype were developed by the IIT Delhi team. Overseas manufacturing would simply provide the specialised production step needed to etch the design onto a silicon wafer and create a physical chip.

The researchers are also exploring partnerships with industry, public-sector undertakings, and government organisations. They point to planned fabs under Semicon India in Gujarat, Assam, and Odisha. If those facilities become available quickly, they could offer future domestic manufacturing routes for this and other Indian chip designs.

How do semiconductor fabs turn a digital circuit design into a physical chip, and why do smaller manufacturing processes usually improve performance or power efficiency?

The article does not describe fabrication steps in detail. In established semiconductor practice, a fab starts with a circuit layout and repeatedly patterns, deposits, and removes materials on a silicon wafer. These layers form transistors, wiring, and other structures. The resulting wafers are cut, packaged, and tested as chips.

For IIT Delhi, the digital micro-GPU design would first be prepared for a 65-nanometer process. The fab would then reproduce that design physically across silicon wafers. The finished ASIC could be tested for operation, performance, and power use, unlike the current design mapped onto an FPGA.

Smaller process technologies generally allow more transistors and connections in the same area. They can also shorten electrical paths and reduce the energy used by individual switching elements, often improving speed or efficiency. These benefits are general semiconductor knowledge, not details provided in the article, and actual results depend on the design.

Key Facts:

📌 A GPU performs calculations needed to create screen images and graphics.

📌 The micro-GPU targets small, low-power devices.

📌 It is not designed to compete with Nvidia or AMD.

📌 The prototype runs on a Spartan-7 FPGA.

📌 The design is not yet a manufactured product.

📌 Fabrication and validation are still required.

📌 A nanometer is one billionth of a metre.